Add clock-frequency property for hx711 ADC
This is the frequency of PD_SCK. It affects only the high value duration
since low value duration is not relevant and we are not able to switch
faster than the minimum duration specified.
After PD_SCK goes high DOUT is read just before PD_SCK goes down again.
This is necessary because of parasitic capacities on the wiring.
Signed-off-by: Andreas Klinger <ak@xxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/iio/adc/avia-hx711.txt | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/avia-hx711.txt b/Documentation/devicetree/bindings/iio/adc/avia-hx711.txt
index b3629405f568..4bee51d536e1 100644
--- a/Documentation/devicetree/bindings/iio/adc/avia-hx711.txt
+++ b/Documentation/devicetree/bindings/iio/adc/avia-hx711.txt
@@ -8,11 +8,21 @@ Required properties:
See Documentation/devicetree/bindings/gpio/gpio.txt
- avdd-supply: Definition of the regulator used as analog supply
+Optional properties:
+ - clock-frequency: Frequency of PD_SCK
+ This setting affects the duration of the high value
+ phase of the clock (PD_SCK). The low value phase is
+ not affected since it is not relevant for the
+ measurement.
+ Minimum value allowed is 20 kHz because of maximum
+ high time of 50 microseconds.
+
Example:
weight@0 {
compatible = "avia,hx711";
sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
avdd-suppy = <&avdd>;
+ clock-frequency = <100000>;
};
--
2.1.4
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