On Mon, Jun 18, 2018 at 10:11:20AM +0800, Chen-Yu Tsai wrote: > On Fri, Jun 15, 2018 at 5:14 PM, Maxime Ripard > <maxime.ripard@xxxxxxxxxxx> wrote: > > On Thu, Jun 14, 2018 at 11:35:44PM +0800, Chen-Yu Tsai wrote: > >> Hi, > >> > >> This series is the remaining A64 syscon changes from the R40 DWMAC > >> series. The series aligns how the A64 system control exports a regmap > >> for the sun8i DWMAC driver to access with what we've done for the R40. > >> > >> Originally the A64 used the generic syscon for this bit of hardware. > >> But this block also contains mapping bits for the onboard SRAM, used > >> by various peripherals, and other vendor specific bits we may use in > >> the future. It is by no means generic. And we already have a device > >> tree binding and driver for the SRAM part. > >> > >> The first patch make the SRAM control device export a regmap, exposing > >> a single EMAC control register, for the DWMAC driver to consume. > >> > >> The second and third patches rename the A64 compatible string to read > >> "system control", which is what the block is named in the user manual. > >> > >> The last patch fixes up the device node, and also adds the lone mappable > >> SRAM block, which is needed by the Display Engine. > > > > For the serie: > > Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxx> > > Cool. I'll apply them once you've rebased and pushed out any patches you > queued up during the merge window. All should be pushed now, feel free to apply them :) Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com
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