Hi, On Fri, 2014-02-21 at 09:35 -0600, Kumar Gala wrote: > On Feb 20, 2014, at 6:38 PM, Bjorn Andersson <bjorn.andersson@xxxxxxxxxxxxxx> wrote: > > > This bus driver supports the QUP i2c hardware controller in the Qualcomm SOCs. > > The Qualcomm Universal Peripheral Engine (QUP) is a general purpose data path > > engine with input/output FIFOs and an embedded i2c mini-core. The driver > > supports FIFO mode (for low bandwidth applications) and block mode (interrupt > > generated for each block-size data transfer). > > > > Cc: Andy Gross <agross@xxxxxxxxxxxxxx> > > Cc: Stephen Boyd <sboyd@xxxxxxxxxxxxxx> > > Signed-off-by: Ivan T. Ivanov <iivanov@xxxxxxxxxx> > > Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxxxxxx> > > --- <snip> > > > > +config I2C_QUP > > + tristate "Qualcomm QUP based I2C controller" > > + depends on ARCH_MSM > > ARCH_QCOM There is no such symbol, still. Regards, Ivan > - k > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
