* Keerthy <j-keerthy@xxxxxx> [180509 04:03]: > > > On Tuesday 08 May 2018 07:46 PM, Tony Lindgren wrote: > > * Peter Ujfalusi <peter.ujfalusi@xxxxxx> [180508 13:22]: > >> Hi, > >> > >> While based on the datasheet of tps65218 the INT is low active, the GIC_SPI > >> does not support anythin but IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_EDGE_RISING: > >> > >> [ 2.761814] genirq: Setting trigger mode 8 for irq 102 failed (irq_chip_set_type_parent+0x0/0x30) > >> [ 2.770913] tps65218 0-0024: Failed to request IRQ 102 for tps65218: -22 > >> [ 2.777854] tps65218: probe of 0-0024 failed with error -22 > > > > So does the tps65218 have some register to control the interrupt > > direction or is it's datasheet wrong? > > > > BTW, ADC might be a good test case for PMIC interrupt if it has one. > > There is no ADC on this PMIC. > > > > >> Use LEVEL_HIGH for the interrupt as it looks to be the correct setting: > >> INTn of tps65218 is connected to NMIn of the SoC. > >> > >> The offending patches are only in linux-next. > > > > OK Applying these all into omap-for-v4.18/dt. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
