On Fri, May 04, 2018 at 02:38:41AM +0800, Icenowy Zheng wrote: > The H6 has clock/reset controls in PRCM part, like old SoCs such as H3 > and A64. However, the PRCM CCU is rearranged; the register arragement > is now similar to the main CCU of H6, and the PRCM now has two APB > buses to control -- one is clocked from AHB clock derivde from AR100 > clock, the other is clocked from the same mux with AR100 clock. > Therefore a new driver is written for it. > > As there's no official document about the PRCM in H6, all the information > are indirectly collected from BSP and parts of the document, and the > information source is noted as comments in the driver's source code. If > reliable information is provided furtherly, the driver needs to be > rechecked. > > Signed-off-by: Icenowy Zheng <icenowy@xxxxxxx> Applied, thanks! Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com
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