Amelie, On 26/04/2018 21:58:03-0500, Rob Herring wrote: > On Thu, Apr 19, 2018 at 03:21:42PM +0200, Amelie Delaunay wrote: > > RTC driver should not be aware of the PWR registers offset and bits > > position. Furthermore, we can imagine that Disable Backup Protection (DBP) > > relative register and bit mask could change depending on the SoC. So this > > patch moves st,syscfg property from single pwrcfg phandle to pwrcfg > > phandle/offset/mask triplet. > > > > Signed-off-by: Amelie Delaunay <amelie.delaunay@xxxxxx> > > --- > > Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt | 10 ++++++---- > > 1 file changed, 6 insertions(+), 4 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt > > index a66692a..00f8b5d 100644 > > --- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt > > +++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt > > @@ -14,8 +14,10 @@ Required properties: > > It is required only on stm32h7. > > - interrupt-parent: phandle for the interrupt controller. > > - interrupts: rtc alarm interrupt. > > -- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain > > - (RTC registers) write protection. > > +- st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to > > + access control register at offset, and change the dbp (Disable Backup > > + Protection) bit represented by the mask, mandatory to disable/enable backup > > + domain (RTC registers) write protection. > > It's fine to add this, but you are breaking compatibility in the driver > with existing DTBs by requiring these new fields. > I'm fine with that change but I would like confirmation that this has been well thought. Maybe Maxime or Alexandre could give their ack. -- Alexandre Belloni, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html