From: Geert Uytterhoeven <geert+renesas@xxxxxxxxxxxxxx>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi3.
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++--
arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index bf6ba0c7faa0..cc6e63914f7c 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -146,7 +146,7 @@
renesas,function = "scif1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -156,7 +156,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 224f4a7ee52a..da5ce503d214 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -26,6 +26,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ spi0 = &qspi;
};
cpus {
@@ -750,7 +751,7 @@
};
};
- spi: spi@e6b10000 {
+ qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7791", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
--
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