On Tue, Apr 24, 2018 at 9:02 PM, Jernej Škrabec <jernej.skrabec@xxxxxxxx> wrote: > Hi, > > Dne torek, 24. april 2018 ob 15:34:12 CEST je Jagan Teki napisal(a): >> Allwinner A64 has display engine pipeline like other Allwinner SOC's >> A83T/H3/H5. >> >> A64 DE2 behaviour similar to Allwinner A83T where mixer0, connected to tcon0 >> with RGB, LVDS MIPI-DSI and mixer1, connected to tcon1 with HDMI. >> This series merely concentrated on HDMI pipeline and rest will add >> eventually. >> >> patch 1: dt-bindings for a64 DE2 CCU >> >> patch 2: a64 DE2 CCU node addition >> >> patch 3: dt-bindings for a64 DE2 pipeline >> >> patch 4 - 5: dt-bindings for a64 mixer0 and tcon-lcd >> >> patch 6: a64 DE2 pipeline node addition >> >> patch 7 - 8: dt-bindings for a64 HDMI and HDMI PHY >> >> patch 9: a64 HDMI nodes addition >> >> patch 10 - 11: dt-bindings for a64 mixer1 and tcon-tv >> >> patch 12: a64 HDMI pipeline >> >> patch 13: enable HDMI out on bananpi-m64 >> >> Tested HDMI on bananapi-m64 (along with DE2 SRAM C changes from [1] >> thread), able to detect the HDMI but, no penguins on screen. >> >> Request for any suggestions. > > You are mising sunxi-ng clock patches. PLL_VIDEO0 and PLL_VIDEO1 need fixes by > setting minimum stable frequency. Please note that datasheet may have wrong > information. That was obvious in H3 case and I had to check minimum stable > PLL_VIDEO frequency in BSP driver. Can you point me the clock patches? I've phadled only CLK_PLL_VIDEO0 on hdmi_phy So we need CLK_PLL_VIDEO1 as fourth clock? Jagan. -- Jagan Teki Senior Linux Kernel Engineer | Amarula Solutions U-Boot, Linux | Upstream Maintainer Hyderabad, India. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
