On Tue, Apr 10, 2018 at 08:59:30AM +0100, Gustavo Pimentel wrote: > Hi Lorenzo, > > On 09/04/2018 17:03, Lorenzo Pieralisi wrote: > > On Mon, Apr 09, 2018 at 10:41:15AM +0100, Gustavo Pimentel wrote: > >> Adds a callback that defines the maximum number of vectors that can be use > >> by the Root Complex. > >> > >> Since this is a parameter associated to each SoC IP setting, makes sense to > >> be configurable and easily visible to future modifications. > >> > >> The designware IP supports a maximum of 256 vectors. > > > > I think that a DT property instead of a callback would have made more > > sense - I struggle to see the point in defining a callback to initialize > > a variable, this can be done in the generic dwc code (and a DT binding). > > The addition of this callback was done in MSI-X patch series before I take over > the PCIe Designware driver responsibility. However I remember a thread in which > this subject was discussed (see [1]), maybe this could bring some light about > the motive why is was done like this. If you don't agree I can do patch after > this series only focusing on this topic in order to do like to suggested. > > [1] -> https://www.spinics.net/lists/linux-pci/msg61835.html Lucas has a point - it is fine to handle them as you do in this patch, it does not make much sense to add a property for something that strictly depends on the compatible string. Thanks, Lorenzo -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
