Quoting sean.wang@xxxxxxxxxxxx (2018-02-28 19:27:50)
> From: Sean Wang <sean.wang@xxxxxxxxxxxx>
>
> Just add binding for a fixed-factor clock axisel_d4, which would be
> referenced by PWM devices on MT7623 or MT2701 SoC.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Fixes: 1de9b21633d6 ("clk: mediatek: Add dt-bindings for MT2701 clocks")
> Signed-off-by: Sean Wang <sean.wang@xxxxxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Mark Rutland <mark.rutland@xxxxxxx>
> Cc: devicetree@xxxxxxxxxxxxxxx
> ---
Applied to clk-next
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