Re: [PATCH v3 01/15] dt-bindings: clock: mediatek: add missing required #reset-cells

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On 03/16/2018 09:36 PM, Stephen Boyd wrote:
> Quoting sean.wang@xxxxxxxxxxxx (2018-02-17 11:54:36)
>> From: Sean Wang <sean.wang@xxxxxxxxxxxx>
>>
>> All ethsys, pciesys and ssusbsys internally include reset controller, so
>> explicitly add back these missing cell definitions to related bindings
>> and examples.
>>
>> Signed-off-by: Sean Wang <sean.wang@xxxxxxxxxxxx>
>> Cc: Rob Herring <robh@xxxxxxxxxx>
>> Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
>> Cc: Stephen Boyd <sboyd@xxxxxxxxxxxxxx>
>> Cc: linux-clk@xxxxxxxxxxxxxxx
>> Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
>> ---
> 
> Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx>
> 

added to v4.16-next/dts64
Thanks!
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