Hi guys, Are you aware about any activity or any plan for taking the output of an EDA tool such as Protel, Orcad, Cadence Allegro, KiCad, (other) and converting it to a full blow DTS(I) file(s) to describe to the board device level topology? Thanks, Michal This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
