On Tue 13 Mar 09:44 PDT 2018, Thierry Escande wrote:
> @@ -50,6 +54,9 @@
> #define IBS_TX_IDLE_TIMEOUT_MS 2000
> #define BAUDRATE_SETTLE_TIMEOUT_MS 300
>
> +/* divclk4 rate */
The clock is called "susclk" in the BT chip, "divclk4" is the board
specific name for the clock source.
> +#define DIVCLK4_RATE_32KHZ 32768
> +
> /* HCI_IBS transmit side sleep protocol states */
> enum tx_ibs_states {
> HCI_IBS_TX_ASLEEP,
> @@ -111,6 +118,12 @@ struct qca_data {
> u64 votes_off;
> };
>
> +struct qca_serdev {
> + struct hci_uart serdev_hu;
> + struct gpio_desc *bt_en;
> + struct clk *divclk4;
Rename this to "susclk", or simply "clk".
> +};
Apart from this and Andy's comments this looks good.
Regards,
Bjorn
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