On Wed, Mar 07, 2018 at 04:27:51PM +0100, Alexandre Belloni wrote: > On 07/03/2018 at 15:17:56 +0000, James Hogan wrote: > > On Tue, Mar 06, 2018 at 01:16:04PM +0100, Alexandre Belloni wrote: > > > diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi > > > new file mode 100644 > > > index 000000000000..8c3210577410 > > > --- /dev/null > > > +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi > > > @@ -0,0 +1,117 @@ > > > +//SPDX-License-Identifier: (GPL-2.0 OR MIT) > > > > Niggle: there should be a space after // for consistency with other > > files. Same in patch 3. > > > > Ah, yes... > > If that is the only thing left, I can resend right away There are a couple of irqchip patches from v2 which have gone from the latest versions: https://patchwork.linux-mips.org/project/linux-mips/list/?series=568 and the vendor prefix too from v4: https://patchwork.linux-mips.org/project/linux-mips/list/?series=856 I presume they're all still relevant. Were you expecting the irqchip ones to go through MIPS too? We'd need an ack from the irqchip folk if so. Cheers James
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