+Viresh
On Tue, Mar 6, 2018 at 7:05 AM, Amit Kucheria <amit.kucheria@xxxxxxxxxx> wrote:
> From: Rajendra Nayak <rnayak@xxxxxxxxxxxxxx>
>
> Add cpu cooling maps for cpu passive trip points. The cpu cooling
> device states are mapped to cpufreq based scaling frequencies.
>
> Signed-off-by: Rajendra Nayak <rnayak@xxxxxxxxxxxxxx>
> Signed-off-by: Amit Kucheria <amit.kucheria@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index e468277..acac9e3 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -15,6 +15,7 @@
> #include <dt-bindings/clock/qcom,gcc-msm8916.h>
> #include <dt-bindings/reset/qcom,gcc-msm8916.h>
> #include <dt-bindings/clock/qcom,rpmcc.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> / {
> model = "Qualcomm Technologies, Inc. MSM8916";
> @@ -115,6 +116,10 @@
> cpu-idle-states = <&CPU_SPC>;
> clocks = <&apcs 0>;
> operating-points-v2 = <&cpu_opp_table>;
> + /* cooling options */
> + cooling-min-level = <0>;
> + cooling-max-level = <7>;
Viresh is working on removing these from the binding...
> + #cooling-cells = <2>;
> };
>
> CPU1: cpu@1 {
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