Re: [PATCH v5 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

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Hi Benoit,

On Thu, Mar 01, 2018 at 02:35:16PM -0600, Benoit Parrot wrote:
> > +	writel(CSI2TX_DPHY_CLK_WAKEUP_ULPS_CYCLES(32),
> > +	       csi2tx->base + CSI2TX_DPHY_CLK_WAKEUP_REG);
> 
> I am sorry if I missed this previously but do all these
> CSI2TX_DPHY* reg access assume that "has_internal_dphy" is true?

It seems like it's needed even for the case without an internal
DPHY. I'll check, and add a comment if it's really the case.

Thanks!
Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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