On Fri, Mar 02, 2018 at 01:35:43PM +0530, Kishon Vijay Abraham I wrote: > >>> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt > >>> new file mode 100644 > >>> index 000000000000..b563cf54ca7b > >>> --- /dev/null > >>> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt > >>> @@ -0,0 +1,52 @@ > >>> +HiSilicon INNO USB2 PHY > >>> + > >>> +Required properties: > >>> +- compatible: Should be one of the following strings: > >>> + "hisilicon,inno-usb2-phy", > >>> + "hisilicon,hi3798cv200-usb2-phy". > >>> +- reg: Should be the address space for PHY configuration register in peripheral > >>> + controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC. > >>> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to > >>> + reference. > >> > >> This can be '0' if the consumers directly use phandle to the subnodes. > > > > Yes, I understand that for most of PHY devices #phy-cells is just 0, and > > consumers simply use the phandle without any cell number. But for this > > inno-usb2-phy, every single device contains two PHY ports, and each port > > Why not have a separate sub-node for each phy port? Then you can just use > phandle to the subnode in the controller node. It sounds like a sensible suggestion. I will try to implement that and see how it goes. Thanks. Shawn -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
