On 01/23/2018 09:51 AM, Sean Wang wrote:
> On Sat, 2017-12-23 at 23:35 +0800, Sean Wang wrote:
>> On Sat, 2017-12-23 at 08:52 +0100, Matthias Brugger wrote:
>>>
>>> On 12/22/2017 07:06 AM, sean.wang@xxxxxxxxxxxx wrote:
>>>> From: Sean Wang <sean.wang@xxxxxxxxxxxx>
>>>>
>>>> On bpi-r2 board, totally there're four uarts which we usually called
>>>> uart[0-3] helpful to extend slow I/O devices. Among those ones, uart2 has
>>>> dedicated pin slot which is used to conolse log. uart[0-1] appear at the
>>>> 40-pins connector and uart3 has no pinout, but just has test points (TP47
>>>> for TX and TP48 for RX, respectively) nearby uart2. Also, some missing
>>>> pinctrl is being complemented for those devices.
>>>>
>>>> Signed-off-by: Sean Wang <sean.wang@xxxxxxxxxxxx>
>>>> ---
>>>> arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 26 ++++++++++++++++++++++++--
>>>> 1 file changed, 24 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
>>>> index 7bf5aa2..64bf5db 100644
>>>> --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
>>>> +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
>>>> @@ -409,6 +409,20 @@
>>>> <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
>>>> };do you like it or quite want me to remove the uart3 node?
>>>> };
>>>> +
>>>> + uart2_pins_a: uart@2 {
>>>> + pins_dat {
>>>> + pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
>>>> + <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
>>>> + };
>>>> + };
>>>> +
>>>> + uart3_pins_a: uart@3 {
>>>> + pins_dat {
>>>> + pinmux = <MT7623_PIN_242_URTS2_FUNC_URTS2>,
>>>> + <MT7623_PIN_243_UCTS2_FUNC_UTXD3>;
>>>> + };
>>>> + };
>>>> };
>>>>
>>>> &pwm {
>>>> @@ -454,16 +468,24 @@
>>>> &uart0 {
>>>> pinctrl-names = "default";
>>>> pinctrl-0 = <&uart0_pins_a>;
>>>> - status = "disabled";
>>>> + status = "okay";
>>>> };
>>>>
>>>> &uart1 {
>>>> pinctrl-names = "default";
>>>> pinctrl-0 = <&uart1_pins_a>;
>>>> - status = "disabled";
>>>> + status = "okay";
>>>> };
>>>>
>>>> &uart2 {
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&uart2_pins_a>;
>>>> + status = "okay";
>>>> +};
>>>> +
>>>> +&uart3 {
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&uart3_pins_a>;
>>>> status = "okay";
>>>> };
>>>>
>>>
>>> Why do we want to enable uart3 when there are only test points?
>>> It is not very useful, or do I oversee something?
>>>
>
>> I have been listening to the sound from potential users of bpi-r2 to
>> understand what assistance I have to provide to them. Something could
>> be seen through [1] in the forum to know they had been trying hard to
>> explore all available UARTs from the SoC in the last weeks. The patch
>> should be really useful for these people and for the extra soldering
>> it shouldn't become a problem for these makers.
>>
>> [1] http://forum.banana-pi.org/t/gpio-uart-not-the-debug-port/3748
>>
>> Sean
>>
>
> Hi, Matthias
>
> do you like it or quite want me to remove the uart3 node?
>
> I can take it into account along with other pending dts changes in my
> queue.
>
Sorry for the late answer.
Do I understand correctly that uart3 is routed to TP47 and TP48, and these test
points are accessible through the SATA connector? Doesn't they break SATA then?
I think as they are only available through a non-documented test point, we
shouldn't enable it.
Regards,
Matthias
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