On Sat, Jan 20, 2018 at 11:13:56AM -0600, David Lechner wrote: > This adds a new binding for the clocks present in the CFGCHIP syscon > registers in TI DA8XX SoCs. > > Signed-off-by: David Lechner <david@xxxxxxxxxxxxxx> > --- > > v6 changes: > - combine "dt-bindings: clock: Add bindings for DA8XX CFGCHIP gate clocks", > "dt-bindings: clock: Add binding for TI DA8XX CFGCHIP mux clocks" and > "dt-bindings: clock: Add bindings for TI DA8XX USB PHY clocks" into a single > file containing all CFGCHIP clocks bindings > - added compatible = "ti,da830-div4p5ena" > - added compatible = "ti,da850-async1-clksrc" > - renamed other compatible strings > - changed and added some clk-names strings > - USB PHY clocks are combined into a single node with #clock-cells = <1> > > .../bindings/clock/ti/davinci/da8xx-cfgchip.txt | 93 ++++++++++++++++++++++ > 1 file changed, 93 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip.txt Reviewed-by: Rob Herring <robh@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
