On 18/01/18 15:43, Boris Brezillon wrote: > Add a driver for Cadence DPI -> DSI bridge. > > This driver only support a subset of Cadence DSI bridge capabilities. > > Here is a non-exhaustive list of missing features: > * burst mode > * DPHY init/configuration steps > * support for additional input interfaces (SDI input) I think it would be good to have a list of features that are supported and tested, and perhaps a word about the development setup you have. One thing that slightly worries me are the DPHY and input pixel clock rates. Now the code expects that those values match perfectly, which is not the case in real life. So what's the accepted difference, and is there something in the registers to program differently depending on the diff? Another thing is that the mode->crtc_clock is in kHz, I wonder if that rounding can cause miscalculations in the above code. Tomi -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
