From: Pratyush Anand <pratyush.anand@xxxxxx> SPEAr13XX uses designware PCIe controller. This patch adds information for the binding properties which are specific to SPEAr13XX SoC series. Signed-off-by: Pratyush Anand <pratyush.anand@xxxxxx> Cc: Mohit Kumar <mohit.kumar@xxxxxx> Cc: Arnd Bergmann <arnd@xxxxxxxx> Cc: Viresh Kumar <viresh.linux@xxxxxxxxx> Cc: spear-devel@xxxxxxxxxxx Cc: devicetree@xxxxxxxxxxxxxxx --- .../devicetree/bindings/pci/spear13xx-pcie.txt | 14 ++++++++++++++ 1 files changed, 14 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/spear13xx-pcie.txt diff --git a/Documentation/devicetree/bindings/pci/spear13xx-pcie.txt b/Documentation/devicetree/bindings/pci/spear13xx-pcie.txt new file mode 100644 index 0000000..700e43e --- /dev/null +++ b/Documentation/devicetree/bindings/pci/spear13xx-pcie.txt @@ -0,0 +1,14 @@ +SPEAr13xx PCIe DT detail: +================================ + +SPEAr13xx uses synopsis designware PCIe controller and ST MiPHY40lp as phy +controller. + +Required properties: +- compatible : should be "st,spear1340-pcie", "snps,dw-pcie". +- phys : phandle to phy node associated with pcie controller +- phy-names : must be "pcie-phy" +- All other definitions as per generic PCI bindings + + Optional properties: +- st,pcie-is-gen1 indicates that forced gen1 initialization is needed. -- 1.7.0.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
