On Saturday 08 February 2014, Liviu Dudau wrote: > Yes, that parsing code of ranges is incorrect in light of the current discussion. I > will try to propose a fix in the v2 series. > > Regarding your PCI IO range: if your bus address starts at 0x8000_0000, would > that not cause problems with devices that use less than 32bits for address > decoding? It is a rather unusual setup, I believe the x86 world (even PCI spec?) > mandates IO bus ranges in the first 16MB of address range? Actually even less than that. The common location of the I/O aperture is 0x0000-0xffff in bus space, which comes from the way the x86 instruction set handles it. You can have larger bus addresses, but you can easily get into trouble that way. One limitation is that the total I/O space size for all buses combined is 2MB on arm32 (to be extended to 16MB on arm64 as it stands right now), the other is that we probably have code assuming that io_offset is a non-negative number, i.e. the bus address is equal or less than the logial I/O port number, which in turn is limited to a few MB. Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
