On Mon, 2017-12-11 at 22:13 +0800, Yixun Lan wrote: > Switch the uart_ao pclk to CLK81 since the clock driver is ready. > Also move the clock info to the board.dts instead in the soc.dtsi. Same comment as for ethmac, is it really wise ? Isn't the clock setup the same for the axg family ? > > Signed-off-by: Yixun Lan <yixun.lan@xxxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
