On Monday, December 11, 2017, 3:06:52 PM CET Rasmus Villemoes wrote: > On 2017-12-11 14:45, Rasmus Villemoes wrote: > > On 2017-12-11 11:02, Alexander Stein wrote: > > > >> Oh, and what is the content of register SCFG_SCFGREVCR? > > > > Good point. On my board it's 0xffffffff, set even before U-boot starts, > > and lots board support code in U-boot expects this. I can't immediately > > find examples in the linux source code that actually writes to the scfg, > > Not a write, but we do already implicitly assume SCFG_SCFGREVCR is set > to all-ones: In drivers/pci/dwc/pci-layerscape.c, bits which are > numbered 6-11 in the reference manual are extracted with a regmap_read() > followed by a left-shift by 20 and mask with 0x3f. That's consistent > with me setting bit 0 (reference manual enumeration) using 1U<<31. We set SCFG_SCFGREVCR to all-ones too, even before u-boot in rcw. Problem is, this bit-reversal is only valid for SCFG. It's a shame, but at least add a comment in the code you expect SCFG_SCFGREVCR as 0xffffffff. Best regards, Alexander -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
