On Tue, Feb 04, 2014 at 01:28:20PM -0600, Nishanth Menon wrote: > On 02/04/2014 12:22 PM, Mark Brown wrote: > > You're assuming that the frequency is a unique key here. That may not > > be the case, for example two OPPs might have the same CPU clock > > (assuming that's the frequency you're referring to) but different bus > > clocking and of course the CPUs or CPU clusters might be individually > > scalable (this is common in big.LITTLE designs I think). > Which is why OPPs are maintained per device, bus OPPs belong to bus > device (in TI terminology, we'd be talking of cross domain dependency > here for maintaining asynchronous bridge timing closure constraints - > but ofcourse, other SoCs may or maynot have such constraints). For > scaling bus frequency, we already have infrastructure in place - clock > notifiers - discussion of using that is much deeper topic of it's own. > for each processor that is uniquely transitioning, we'd have it's own > sets of OPPs - the correct representation of the device node is the > key there. I've seen some SoCs characterised over the whole device rather than with individual parts of the SoC done separately.
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