On 27/11/2017 13:28, Greentime Hu wrote: > From: Rick Chen <rickchen36@xxxxxxxxx> > > ATCPIT100 is often used on the Andes architecture, > This timer provide 4 PIT channels. Each PIT channel is a > multi-function timer, can be configured as 32,16,8 bit timers > or PWM as well. > > For system timer it will set channel 1 32-bit timer0 as clock > source and count downwards until underflow and restart again. > > It also set channel 0 32-bit timer0 as clock event and count > downwards until condition match. It will generate an interrupt > for handling periodically. > > Signed-off-by: Rick Chen <rickchen36@xxxxxxxxx> > Signed-off-by: Greentime Hu <green.hu@xxxxxxxxx> > --- Looks good. Please resend this patch folded with the Makefile change and the DT binding (fixed) as suggested by Arnd. I will merge them. Thanks -- Daniel -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
