Yixun Lan <yixun.lan@xxxxxxxxxxx> writes: > Add driver for the clk controller which found in Meson AXG SoC > > Note, we deliberately create a seperate source file for the Meson AXG > series, instead of sharing code with previous GXBB/GXL - the file axg.c > It would help us maintaining the code more easily. In addition to the DT node-name fixup (c.f. reply on v3 series), I think this series should also include a patch that switches the UART over to the new clock provider (it's currently using the xtal fixed clock.) This will also provide a simple way to validate/test the series. Kevin -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
