* Adam Ford <aford173@xxxxxxxxx> [171202 00:20]: > On Mon, Sep 11, 2017 at 4:50 PM, Rob Herring <robh@xxxxxxxxxx> wrote: > > On Wed, Aug 30, 2017 at 08:19:50AM -0700, Tony Lindgren wrote: > >> On omap4 we're missing the PowerVR SGX GPU node with it's related > >> "ti,hwmods" property that the SoC interconnect code needs. > >> > >> Note that this will only show up as a bug with "doesn't have > >> mpu register target base" boot errors when the legacy platform > >> data is removed. > >> > >> Cc: Mark Rutland <mark.rutland@xxxxxxx> > >> Cc: Rob Herring <robh+dt@xxxxxxxxxx> > >> Cc: Tomi Valkeinen <tomi.valkeinen@xxxxxx> > >> Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx> > >> --- > > Out of curiosity, is anything being done with this? I'm really > interested to see the PVR working in a modern kernel. I'd like to > help more, but I am afraid I don't fully understand the interconnects > and how the driver componenets interact with the omap processor. > > Please let me know if there are sub-tasks that I can assist. Well the powervr node should use a powervr generic binding that does not yet exist. I think the TI tree binding could be easily modified for a generic binding. So first doing a binding patch for powervr and Cc dt list and SoC maintainers with powervr on them would help. And then eventually the powervr generic node should be a child node under the "target-module" node in the dtsi file. See what we have for gpu target-module@56000000 in omap4.dtsi. Note that the interconnect target module does not yet work for omap3 as the clocks are different. I'll be posting patches for the clocks over next few weeks. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
