On 11/28/2017 07:26 AM, Alexandre Belloni wrote: > Add bindings for Microsemi SoCs. Currently only Ocelot is supported. > > Signed-off-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxxxxxxxxx> > --- > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > Cc: devicetree@xxxxxxxxxxxxxxx > > Documentation/devicetree/bindings/mips/mscc.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mips/mscc.txt > > diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt > new file mode 100644 > index 000000000000..2c52e76b7142 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mips/mscc.txt > @@ -0,0 +1,6 @@ > +* Microsemi MIPS CPUs > + > +Required properties: > +- compatible: "brcm,ocelot" You probably intended to use mscc,ocelot here, right? -- Florian -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
