On 11/17/2017 2:35 AM, Stefan Wahren wrote:
> Hi Eric,
>
>> Stefan Wahren <stefan.wahren@xxxxxxxx> hat am 31. Oktober 2017 um 09:43 geschrieben:
>>
>>
>> Hi Eric,
>>
>>> Eric Anholt <eric@xxxxxxxxxx> hat am 31. Oktober 2017 um 01:40 geschrieben:
>>>
>>>
>>> Stefan Wahren <stefan.wahren@xxxxxxxx> writes:
>>>
>>>>> Stefan Wahren <stefan.wahren@xxxxxxxx> hat am 7. Oktober 2017 um 12:16 geschrieben:
>>>>>
>>>>>
>>>>> In case the RPi Zero has at least a device connected to the OTG port
>>>>> at boot time, the upper limit of tx fifo size for endpoint 6 and 7 is
>>>>> also reduced to 512 bytes. So fix this accordingly.
>>>>>
>>>>> Signed-off-by: Stefan Wahren <stefan.wahren@xxxxxxxx>
>>>>> Fixes: 1aa1d858f582 ("ARM: dts: bcm283x: Add dtsi for OTG mode")
>>>>
>>>> gentle ping ...
>>>
>>> I've tried to make sense of this a couple of times, but I don't get it:
>>> why does EP 6/7 get reduced to 512 bytes in this case?
>>
>> i cannot give you an answer for this specific case.
>>
>> Since the dwc2 databook isn't public, i started a thread on linux-usb [1] about proper fifo size configuration. But i didn't get any reply.
>>
>> The problem here is there different contraints:
>> * the sum of all fifo values must not exceed 3776 bytes
>> * each slot have its individual upper limit (available in the BCM2835 datasheet)
>>
>> During my tests for OTG mode i missed the specific case above. Now my determined limits of 512 for EP 6 and 7 are contrary to the BCM2835 datasheet. Maybe the Synopsys guys have an answer?
>>
>> Btw the values in the downstream tree also violate the contraints.
>>
>> [1] - https://urldefense.proofpoint.com/v2/url?u=https-3A__www.spinics.net_lists_linux-2Dusb_msg157200.html&d=DwICaQ&c=DPL6_X_6JkXFx7AXWqB0tg&r=6z9Al9FrHR_ZqbbtSAsD16pvOL2S3XHxQnSzq8kusyI&m=O2ngUGajgx3MfHk4IQKp5iRlwOOpG62gkji4R2gE64k&s=8ClOBwWN5B69mL1TDjnN3l78JBrvd1YHunRdzei-xrA&e=
>
> still concerns about this patch, because it's not included in dt-fixes?
>
Hi Stefan,
According BCM2835 datasheet Total Data FIFO RAM Depth is 4096. I assume
that in datasheet assumed 4096 dwords, not a bytes. DFIFO depth in
dwords stored GHWCFG3[31:16].
So, for buffer DMA mode max space in dwords which available to allocate
to FIFO's is 4096-8*2=4080, where 8 EP count including EP0 and 2 for
both directions of EP's. Based on bcm283x-rpi-usb-otg.dtsi:
g-rx-fifo-size + g-np-tx-fifo-size + g-tx-fifo-size[1..7] =
256+32+256+256+512+512+512+768+768 = 3872 < 4080.
So, I don't see any reason to change EP 6,7 TxFIFO sizes.
More probably comment in dtsi not correct:
"* fifo sizes shouldn't exceed 3776 bytes."
Please check FIFO depth in GHWCFG3 and if it 4096 then update the comment.
Thanks,
Minas
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