Hi Sergei,
On Fri, Nov 10, 2017 at 6:59 PM, Sergei Shtylyov
<sergei.shtylyov@xxxxxxxxxxxxxxxxxx> wrote:
> Add the PFC support for the R8A77970 SoC including pin groups for some
> on-chip devices such as CAN-FD, EtherAVB, [H]SCIF, I2C, INTC-EX, MMC,
> MSIOF, PWM, VIN...
>
> Based on the original (and large) patch by Daisuke Matsushita
> <daisuke.matsushita.ns@xxxxxxxxxxx>.
>
> Signed-off-by: Vladimir Barinov <vladimir.barinov@xxxxxxxxxxxxxxxxxx>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
Thanks for your patch!
For CPU_ALL_PORT(), pins, groups, and functions:
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in sh-pfc-for-v4.16, with the two nits below fixed.
> --- /dev/null
> +++ renesas-drivers/drivers/pinctrl/sh-pfc/pfc-r8a77970.c
[...]
> +/* - VIN0 ------------------------------------------------------------------- */
[...]
> +static const unsigned int vin0_sync_pins[] = {
> + /* VSYNC#, HSYNC# */
> + RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2),
The order of the above doesn't match the order below (will fix while applying).
> +};
> +static const unsigned int vin0_sync_mux[] = {
> + VI0_HSYNC_N_MARK, VI0_VSYNC_N_MARK,
> +};
> +/* - VIN1 ------------------------------------------------------------------- */
[...]
> +static const unsigned int vin1_sync_pins[] = {
> + /* VSYNC#, HSYNC# */
> + RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 2),
Likewise.
> +};
> +static const unsigned int vin1_sync_mux[] = {
> + VI1_HSYNC_N_MARK, VI1_VSYNC_N_MARK,
> +};
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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