On Fri, Oct 27, 2017 at 09:38:30AM -0500, Rob Herring wrote: > On Fri, Oct 27, 2017 at 11:07:30AM +0800, Shawn Guo wrote: > > From: Jianguo Sun <sunjianguo1@xxxxxxxxxx> > > > > It adds the device tree bindings for PCIE/SATA/USB3 combo PHY found on > > HiSilicon STB SoCs. > > > > Signed-off-by: Jianguo Sun <sunjianguo1@xxxxxxxxxx> > > Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx> > > --- > > .../bindings/phy/phy-hi3798cv200-combphy.txt | 57 ++++++++++++++++++++++ > > 1 file changed, 57 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3798cv200-combphy.txt > > > > diff --git a/Documentation/devicetree/bindings/phy/phy-hi3798cv200-combphy.txt b/Documentation/devicetree/bindings/phy/phy-hi3798cv200-combphy.txt > > new file mode 100644 > > index 000000000000..efb6cd5eae04 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/phy-hi3798cv200-combphy.txt > > @@ -0,0 +1,57 @@ > > +HiSilicon STB PCIE/SATA/USB3 PHY > > Please add a reference to the parent node binding. > > With that, > > Acked-by: Rob Herring <robh@xxxxxxxxxx> Just noticed that we do not have a bindings doc for the parent peripheral controller yet. I will add a new patch for that in v5. Shawn -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
