Change the bindings to use the reworked Marvell NAND controller driver. Also adapt the nand controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxxxxxxxxx> --- arch/arm/boot/dts/pxa3xx.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi index 7a0cc4ea819a..e7cde732bf88 100644 --- a/arch/arm/boot/dts/pxa3xx.dtsi +++ b/arch/arm/boot/dts/pxa3xx.dtsi @@ -116,15 +116,15 @@ status = "disabled"; }; - nand0: nand@43100000 { - compatible = "marvell,pxa3xx-nand"; + nand_controller: nand-controller@43100000 { + compatible = "marvell,pxa3xx-nand-controller"; reg = <0x43100000 90>; interrupts = <45>; clocks = <&clks CLK_NAND>; dmas = <&pdma 97 3>; dma-names = "data"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; status = "disabled"; }; -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html