Under certain circumstances the ethernet PHY cannot be detected on Ka-Ro electronics TX6 modules. Using a phy-reset-post-delay of at least 2ms alleviates this problem. Define it to 10ms to be on the safe side. Signed-off-by: Lothar Waßmann <LW@xxxxxxxxxxxxxxxxxxx> --- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index f2cd3e7..f1655b3 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -249,6 +249,7 @@ clock-names = "ipg", "ahb", "ptp", "enet_out"; phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; + phy-reset-post-delay = <10>; phy-handle = <&etnphy>; phy-supply = <®_3v3_etn>; status = "okay"; -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
