On Tue, Oct 10, 2017 at 03:46:04PM +0530, Kishon Vijay Abraham I wrote: > Add syscon properties required for configuring PCIe in x2 lane mode. > > Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx> > Signed-off-by: Sekhar Nori <nsekhar@xxxxxx> > --- > Documentation/devicetree/bindings/pci/ti-pci.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt > index 82cb875e4cec..455cb74a475c 100644 > --- a/Documentation/devicetree/bindings/pci/ti-pci.txt > +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt > @@ -13,6 +13,10 @@ PCIe DesignWare Controller > - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", > where <X> is the instance number of the pcie from the HW spec. > - num-lanes as specified in ../designware-pcie.txt > + - syscon-lane-conf : phandle/offset pair. Phandle to the system control module and the > + register offset to specify 1 lane or 2 lane. > + - syscon-lane-sel : phandle/offset pair. Phandle to the system control module and the > + register offset to specify lane selection. Needs vendor prefixes. Rob -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
