On Mon, Oct 02, 2017 at 12:47:57PM +0200, Marek Szyprowski wrote:
> Some registers for the Exynos 4412 ISP (Camera subsystem) clocks are
> partially located in the SOC area, which belongs to ISP power domain.
> Because those registers are also located in a different memory region
> than the main clock controller, support for them can be provided by
> a separate clock controller. This in turn allows to almost seamlessly
> make it aware of the power domain using recently introduced runtime
> PM support for clocks.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
> ---
> .../devicetree/bindings/clock/exynos4-clock.txt | 27 ++++
Please split binding doc and include to separate patch.
> drivers/clk/samsung/Makefile | 1 +
> drivers/clk/samsung/clk-exynos4412-isp.c | 179 +++++++++++++++++++++
> include/dt-bindings/clock/exynos4.h | 35 ++++
> 4 files changed, 242 insertions(+)
> create mode 100644 drivers/clk/samsung/clk-exynos4412-isp.c
>
> diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> index f5a5b19ed3b2..9b260e0d1e66 100644
> --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> @@ -41,3 +41,30 @@ Example 2: UART controller node that consumes the clock generated by the clock
> clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
> clock-names = "uart", "clk_uart_baud0";
> };
> +
> +Exynos4412 SoC contains some additional clocks for FIMC-ISP (Camera ISP)
> +subsystem. Registers for those clocks are partially located in the SOC area,
The comma here should be dropped. Can't you just say "...located in the
ISP power domain."?
What does partially mean? Some registers aren't in the ISP power domain?
Where are they then?
> +which belongs to ISP power domain. Because those registers are also located
> +in a different memory region than the main clock controller, a separate clock
> +controller has to be defined for handling them. The compatible string to such
> +controller is "samsung,exynos4412-isp-clock". It also has two input clocks
Once you have a 2nd compatible string, this sentence doesn't work.
> +from the main Exynos4412 clock controller: "aclk200" and "aclk400_mcuisp".
> +The ISP clock controller has to be linked with respective ISP power domain
> +(for more information, see Samsung Exynos power domains bindings).
List out properties and their constraints, not prose describing the
binding.
> +
> +Example 3: An example of a clock controllers for Exynos4412 SoCs.
> +
> + clock: clock-controller@10030000 {
> + compatible = "samsung,exynos4412-clock";
> + reg = <0x10030000 0x18000>;
> + #clock-cells = <1>;
> + };
> +
> + isp_clock: clock-controller@10048000 {
> + compatible = "samsung,exynos4412-isp-clock";
> + reg = <0x10048000 0x1000>;
> + #clock-cells = <1>;
> + power-domains = <&pd_isp>;
> + clocks = <&clock CLK_ACLK200>, <&clock CLK_ACLK400_MCUISP>;
> + clock-names = "aclk200", "aclk400_mcuisp";
> + };
An example is not a binding.
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