On Sun, Oct 08, 2017 at 06:11:12PM +0530, Anand Moon wrote: > Hi Krzysztof, > > On 6 October 2017 at 12:12, Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote: > > On Fri, Oct 6, 2017 at 6:36 AM, Anand Moon <linux.amoon@xxxxxxxxx> wrote: > >> remove the disable and enable of phy clk. > >> phy clk is needed to tune the phy controller. > > > > Drivers should in general enable and disable the clocks they use. Just > > like in patch #1 please describe why you are doing this, what kind of > > problem are you trying to solve and what exactly are you trying to do > > here. > > > > BR, > > Krzysztof > > > > [snip] > > Usually we would disable the clk on error patch and return with failed. > but in the current code we disable the clk in init routine and > enable the clk in disable routine which seem incorrect. No. For example for exynos5_usbdrd_phy_exit() the driver enables the clock only for the access to PHY block (PHY registers). > > [0] https://github.com/torvalds/linux/blob/master/drivers/phy/samsung/phy-exynos5-usbdrd.c#L362-L412 > [1] https://github.com/torvalds/linux/blob/master/drivers/phy/samsung/phy-exynos5-usbdrd.c#L424-L446 > > On 3.10.x kernel clk_summary all the clk are enables. > > mout_usbdrd300 3 3 24000000 > dout_usbdrd300 2 2 24000000 > sclk_usbdrd300 1 1 24000000 > dout_usbphy300 2 2 24000000 > sclk_usbphy300 1 1 24000000 > mout_usbdrd301 3 3 24000000 > dout_usbdrd301 2 2 24000000 > sclk_usbdrd301 1 1 24000000 > dout_usbphy301 2 2 24000000 > sclk_usbphy301 1 1 24000000 > > Some more changes in clk driver might be required to stabilize the usb module. Please describe the issues with stability first. Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
