Hi
On 09/14/2017 04:28 PM, Pierre-Yves MORDRET wrote:
This patch adds I2C1 support for STM32F746 SoC.
Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@xxxxxxxxx>
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@xxxxxx>
---
Version history:
v4:
v3:
* None
v2:
* Update I2C SoC device tree with latest Linux version
---
---
arch/arm/boot/dts/stm32f746.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 4506eb9..ddd8f2c 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
Applied on stm32-dt-for-v4.15 branch.
Thanks
Alex
@@ -361,6 +361,16 @@
bias-disable;
};
};
+
+ i2c1_pins_b: i2c1@0 {
+ pins {
+ pinmux = <STM32F746_PB9_FUNC_I2C1_SDA>,
+ <STM32F746_PB8_FUNC_I2C1_SCL>;
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
};
crc: crc@40023000 {
@@ -380,6 +390,18 @@
assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
assigned-clock-rates = <1000000>;
};
+
+ i2c1: i2c@40005400 {
+ compatible = "st,stm32f7-i2c";
+ reg = <0x40005400 0x400>;
+ interrupts = <31>,
+ <32>;
+ resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
+ clocks = <&rcc 1 CLK_I2C1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
};
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