When the arbitration between NOR and NAND flash is enabled
the <FORCE_CSX> field bit[21] in the Data Flash Control Register
needs to be set to 1 according to guidleine GL-5830741.
This patch series contain the following patches:
* Patch 1: "dt-bindings: mtd: pxa3xx: Add "marvell,nand-force-csx" compatible string"
* New binding is introduced to implement the guildeline GL-5830741 which will
be activated in the appropriate device tree files.
* Patch 2: "mtd: nand: pxa3xx: Handle "marvell,nand-force-csx" compatible string"
* Set the FORCE_CSX bit in Data Flash Control Register if "marvell,nand-force-csx"
compatible string is activated in the device tree.
-----------------
Kalyan Kinthada (2):
[PATCH 1/2] dt-bindings: mtd: pxa3xx: Add "marvell,nand-force-csx" compatible string
[PATCH 2/2] mtd: nand: pxa3xx: Handle "marvell,nand-force-csx" compatible string
Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt | 1 +
drivers/mtd/nand/pxa3xx_nand.c | 6 ++++++
include/linux/platform_data/mtd-nand-pxa3xx.h | 3 +++
3 files changed, 10 insertions(+)
--
2.14.1
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