On Mon, Sep 25, 2017 at 10:29:38AM +0000, Icenowy Zheng wrote: > > > 于 2017年9月25日 GMT+08:00 下午6:27:44, Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx> 写到: > >On Mon, Sep 25, 2017 at 10:12:09AM +0000, Icenowy Zheng wrote: > >> 于 2017年9月25日 GMT+08:00 下午6:10:27, Maxime Ripard > ><maxime.ripard@xxxxxxxxxxxxxxxxxx> 写到: > >> >Hi, > >> > > >> >On Sat, Sep 23, 2017 at 12:15:28AM +0000, Icenowy Zheng wrote: > >> >> This patchset imports simple DVFS support for Allwinner A64 SoC. > >> >> > >> >> As the thermal sensor driver is not yet implemented and some > >boards > >> >> have still no AXP PMIC support, now only two OPPs are present -- > >> >> 648MHz@1.04V and 816MHz@1.1V to prevent overheat or undervoltage. > >> >> > >> >> PATCH 1 is a fix to the CCU driver of A64, and the remaining > >patches > >> >> set up the device tree bits of the DVFS on Pine64. > >> > > >> >How has this been tested? > >> > > >> >What tasks did you run, with what governor, etc... > >> > >> I only tested manual frequency switching between 648MHz and > >> 816MHz, and tested the PLL stuck issue by change the OPPs to > >> some random value. > > > >Ideally, we should test that it's actually reliable. Poorly chosen > >OPPs might lead to corrupt data that you might not get before a while. > > These are OPPs from the official sys_config.fex . And the rest of the code isn't, such as the clock or regulator code that is critical as well here. I'm not asking this out of nowhere, we've had to debug this more than once already. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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