> Even with CLK_BUS_EPHY/RST_BUS_EPHY enabled, the MAC reset timeout. > So no the CLK/RST are really for the PHY. Thanks for trying that. You said it was probably during scanning of the bus it times out. What address is causing the timeout? 0 or 1? If the internal bus can only have one PHY on it, maybe we need to set bus->phy_mask to 0x1? Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
