Re: more pedantic proofing of DTSpec version 0.1

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On Tue, 5 Sep 2017, Frank Rowand wrote:

> On 08/31/17 13:56, Rob Herring wrote:
> > On Sat, Aug 26, 2017 at 10:50:46AM -0400, Robert P. J. Day wrote:
> >>
>
> < snip >
>
> >> p. 25: table 3.6, the acronym "PIR" comes out of nowhere, perhaps
> >> explain it the first time?
> >
> > I'm drawing a blank as to what that is.
>
> According to the Mindshare book: PowerPC System Architecture:
>
> "Processor ID Register (PIR)
>
> The PIR is a 32-bit register that can be used by the OS to assign
> an ID to the processor.  Aside from any OS-specific usage of the
> assigned ID, the processor uses the ID when communicating with
> I/O devices."

  whoops, then my patch was wrong. dang.

rday

-- 

========================================================================
Robert P. J. Day                                 Ottawa, Ontario, CANADA
                        http://crashcourse.ca

Twitter:                                       http://twitter.com/rpjday
LinkedIn:                               http://ca.linkedin.com/in/rpjday
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