On Wed, Aug 09, 2017 at 12:52:41AM +0200, Hauke Mehrtens wrote:
> From: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
>
> The reset controllers (on xRX200 and newer SoCs have two of them) are
> provided by the RCU module. This was initially implemented as a simple
> reset controller. However, the RCU module provides more functionality
> (ethernet GPHYs, USB PHY, etc.), which makes it a MFD device.
> The old reset controller driver implementation from
> arch/mips/lantiq/xway/reset.c did not honor this fact.
>
> For some devices the request and the status bits are different.
>
> Signed-off-by: Hauke Mehrtens <hauke@xxxxxxxxxx>
> Cc: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>
> ---
> .../devicetree/bindings/reset/lantiq,reset.txt | 30 +++
> drivers/reset/Kconfig | 6 +
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-lantiq.c | 212 +++++++++++++++++++++
> 4 files changed, 249 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/reset/lantiq,reset.txt
> create mode 100644 drivers/reset/reset-lantiq.c
>
> diff --git a/Documentation/devicetree/bindings/reset/lantiq,reset.txt b/Documentation/devicetree/bindings/reset/lantiq,reset.txt
> new file mode 100644
> index 000000000000..c1c48aa099b3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/lantiq,reset.txt
> @@ -0,0 +1,30 @@
> +Lantiq XWAY SoC RCU reset controller binding
> +============================================
> +
> +This binding describes a reset-controller found on the RCU module on Lantiq
> +XWAY SoCs.
> +
> +This driver has to be a sub node of the Lantiq RCU block.
s/driver/node/
> +
> +-------------------------------------------------------------------------------
> +Required properties:
> +- compatible : Should be one of
> + "lantiq,danube-reset"
> + "lantiq,xrx200-reset"
> +- reg : Defines the following sets of registers in the parent
> + syscon device
> + - Offset of the reset set register
> + - Offset of the reset status register
> +- #reset-cells : Specifies the number of cells needed to encode the
> + reset line, should be 2.
> + The first cell takes the reset set bit and the
> + second cell takes the status bit.
> +
> +-------------------------------------------------------------------------------
> +Example for the reset-controllers on the xRX200 SoCs:
> + reset0: reset-controller@0 {
Should be: reset-controller@10
With those fixed,
Acked-by: Rob Herring <robh@xxxxxxxxxx>
> + compatible = "lantiq,xrx200-reset";
> + reg <0x10 0x04>, <0x14 0x04>;
> +
> + #reset-cells = <2>;
> + };
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