On 08/11/2017 05:09 PM, Abhishek Sahu wrote:
Add the compatible string for IPQ8074 QPIC NAND controller
version 1.5.0 which uses BAM DMA and its FLASH_DEV_CMD registers
starting offset is 0x7000.
Reviewed-by: Archit Taneja <architt@xxxxxxxxxxxxxx>
Thanks,
Archit
Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx>
---
drivers/mtd/nand/qcom_nandc.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
index 03e671e..1484fb4 100644
--- a/drivers/mtd/nand/qcom_nandc.c
+++ b/drivers/mtd/nand/qcom_nandc.c
@@ -2863,6 +2863,12 @@ static int qcom_nandc_remove(struct platform_device *pdev)
.flash_dev_offset = 0x0,
};
+static const struct qcom_nandc_props ipq8074_nandc_props = {
+ .ecc_modes = (ECC_BCH_4BIT | ECC_BCH_8BIT),
+ .is_bam = true,
+ .flash_dev_offset = 0x7000,
+};
+
/*
* data will hold a struct pointer containing more differences once we support
* more controller variants
@@ -2876,6 +2882,10 @@ static int qcom_nandc_remove(struct platform_device *pdev)
.compatible = "qcom,ipq4019-nand",
.data = &ipq4019_nandc_props,
},
+ {
+ .compatible = "qcom,ipq8074-nand",
+ .data = &ipq8074_nandc_props,
+ },
{}
};
MODULE_DEVICE_TABLE(of, qcom_nandc_of_match);
--
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