Hi Marc, 2017-08-07 22:36 GMT+09:00 Marc Zyngier <marc.zyngier@xxxxxxx>: > On 07/08/17 12:59, Masahiro Yamada wrote: >> Hi Marc, >> >> Thanks for your comments. >> >> >> 2017-08-07 19:43 GMT+09:00 Marc Zyngier <marc.zyngier@xxxxxxx>: >>> On 03/08/17 12:15, Masahiro Yamada wrote: >>>> UniPhier SoCs contain AIDET (ARM Interrupt Detector). This is intended >>>> to provide additional features that are not covered by GIC. The main >>>> purpose is to provide logic inverter to support low level and falling >>>> edge trigger type for interrupt lines from on-board devices. >>>> >>>> Signed-off-by: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx> Thanks. I will send v2 based on your comments. If possible, could you help me with my GPIO driver? I implemented a similar IRQ domain hierarchy handling in the driver. This patch: http://patchwork.ozlabs.org/patch/797145/ If I am understanding correctly, the IRQ mapping to the parent must be somehow hard-coded in the .alloc() hook of irq_domain_ops. I asked a question in the following. https://lkml.org/lkml/2017/7/6/758 I do not have a solution to get the IRQ info from "interrupts" property, so I am hard-coding it in the driver. -- Best Regards Masahiro Yamada -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
