On Fri, Jul 28, 2017 at 11:13:11PM +0200, Martin Blumenstingl wrote: > The Amlogic Meson8/Meson8b/Meson8m2 clock controller provides some reset > lines. These are used for example to boot the secondary CPU cores. > > This patch describes the reset controller which is embedded into the > clock controller on these SoCs. > A header file is provided which provides preprocessor macros for each > reset line (to make the .dts files easier to read). > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx> > Reviewed-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx> > --- > .../bindings/clock/amlogic,meson8b-clkc.txt | 9 +++++++- > .../dt-bindings/reset/amlogic,meson8b-clkc-reset.h | 27 ++++++++++++++++++++++ > 2 files changed, 35 insertions(+), 1 deletion(-) > create mode 100644 include/dt-bindings/reset/amlogic,meson8b-clkc-reset.h Acked-by: Rob Herring <robh@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
