于 2017年7月28日 GMT+08:00 下午5:44:51, Chen-Yu Tsai <wens@xxxxxxxx> 写到:
>On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
><clabbe.montjoie@xxxxxxxxx> wrote:
>> This patch adds the sun8i-h3-ephy compatible to the internal PHY.
>>
>> Signed-off-by: Corentin Labbe <clabbe.montjoie@xxxxxxxxx>
>> ---
>> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
>
>To avoid repeating the past, this patch, if approved, will be merged
>through the sunxi tree, not netdev nor net-next.
>
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
>b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
>> index 4b599b5d26f6..7aaa837c2388 100644
>> --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
>> +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
>> @@ -421,7 +421,8 @@
>> #address-cells = <1>;
>> #size-cells = <0>;
>> int_mii_phy: ethernet-phy@1 {
>> - compatible =
>"ethernet-phy-ieee802.3-c22";
>> + compatible =
>"allwinner,sun8i-h3-ephy",
>> +
>"ethernet-phy-ieee802.3-c22";
>
>Are you expecting people to override this properly?
>
>As it currently is, any external phy at address 1 will simply
>reuse the same device node. And if they don't override the
>property correctly, the driver will end up trying to use
>the internal phy, while the user is expecting the external
>one to be used.
>
>Maybe you could move this to some other address, maybe the last
>valid one, or second last valid one?
Some board designers may use other address.
For example, on Nano Pi NEO2 the PHY is attached at address 0x7.
>
>ChenYu
>
>> reg = <1>;
>> clocks = <&ccu CLK_BUS_EPHY>;
>> resets = <&ccu RST_BUS_EPHY>;
>> --
>> 2.13.0
>>
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