在 2017-07-26 19:44，Maxime Ripard 写道：
Hi,
On Wed, Jul 26, 2017 at 12:23:48PM +0200, Ondřej Jirman wrote:
Hi,
icenowy@xxxxxxx píše v St 26. 07. 2017 v 15:36 +0800:
>
> > > >
> > > > Otherwse
> > > >
> > > > > + regulator-max-microvolt = <1400000>;
> > > > > + regulator-ramp-delay = <200>;
> > > >
> > > > Is this an actual constraint of the SoC? Or is it a characteristic
> > > > of the regulator? If it is the latter, it belongs in the driver.
> > > > AFAIK the regulator supports varying the ramp delay (slew rate).
>
> I don't know...
>
> Maybe I should ask Ondrej?
It is probably neither.
It is used to calculate a delay inserted by the kernel between setting
a new target voltage over I2C and changing the frequency of the CPU.
The actual delay is calculated by the difference between previous and
the new voltage.
I don't remember seeing anything in the datasheet of the regulator.
This is just some low value that works.
It would probably be dependent on the capacitance on the output of the
regulator, actual load (which varies), etc. So it is a board specific
value. One could measure it with an oscilloscope if there's a need to
optimize this.
If this is a reasonable default, then this should be in the
driver. You can't expect anyone to properly calculate a ramp delay and
have access to both a scope and the CPU power lines.
It seems that in regulator_desc structure a default value of ramp delay
can be set, and the ones specified in dt can override it.
So just add .ramp_delay = 200 in the driver's regulator_desc part?
Should a comment be added that explains it's only an experienced value
on Allwinner H3/H5 boards VDD-CPUX usage?
Maxime
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