No...I've only got an Olimex SOM EVB which exposes these pins on a GPIO header (like many of the dev boards). Just thought if we included them in the dtsi then adding overlays for i2s devices would be simplified. BR, CK On 24 July 2017 at 10:20, Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx> wrote: > Hi Marcus, > > On Sat, Jul 22, 2017 at 08:43:13AM +0200, codekipper@xxxxxxxxx wrote: >> From: Marcus Cooper <codekipper@xxxxxxxxx> >> >> The A20 SoC has a couple of i2s blocks. This patch adds >> the pinctrl settings for block i2s0. >> >> Signed-off-by: Marcus Cooper <codekipper@xxxxxxxxx> > > We're not adding pin groups that are not used by anyone. If you have a > board using them, please send the DT for that board too. > > Thanks! > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
