From: Ram Chandra Jangir <rjangir@xxxxxxxxxxxxxx>
GPIO_PULL bits configurations in TLMM_GPIO_CFG register
differs for IPQ40xx from rest of the other qcom SoCs.
As it does not support the keeper state and therefore can't
support bias-bus-hold property.
This patch adds a pull_no_keeper setting which configures the
msm_gpio_pull bits for ipq40xx. This is required to fix the
proper configurations of gpio-pull bits for nand pins mux.
IPQ40xx SoC:
2'b10: Internal pull up enable.
2'b11: Unsupport
For other SoC's:
2'b10: Keeper
2'b11: Pull-Up
Note: Due to pull_no_keeper length, all kerneldoc entries
in the msm_pinctrl_soc_data struct had to be realigned.
Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Signed-off-by: Ram Chandra Jangir <rjangir@xxxxxxxxxxxxxx>
Signed-off-by: Christian Lamparter <chunkeey@xxxxxxxxxxxxxx>
---
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 1 +
drivers/pinctrl/qcom/pinctrl-msm.c | 25 +++++++++++++++++++------
drivers/pinctrl/qcom/pinctrl-msm.h | 16 +++++++++-------
3 files changed, 29 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 9e7f23d29cda..1979b14b6fc3 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -706,6 +706,7 @@ static const struct msm_pinctrl_soc_data ipq4019_pinctrl = {
.groups = ipq4019_groups,
.ngroups = ARRAY_SIZE(ipq4019_groups),
.ngpios = 100,
+ .pull_no_keeper = true,
};
static int ipq4019_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 273badd92561..e5e27d79f5ef 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -202,10 +202,11 @@ static int msm_config_reg(struct msm_pinctrl *pctrl,
return 0;
}
-#define MSM_NO_PULL 0
-#define MSM_PULL_DOWN 1
-#define MSM_KEEPER 2
-#define MSM_PULL_UP 3
+#define MSM_NO_PULL 0
+#define MSM_PULL_DOWN 1
+#define MSM_KEEPER 2
+#define MSM_PULL_UP_NO_KEEPER 2
+#define MSM_PULL_UP 3
static unsigned msm_regval_to_drive(u32 val)
{
@@ -243,10 +244,16 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev,
arg = arg == MSM_PULL_DOWN;
break;
case PIN_CONFIG_BIAS_BUS_HOLD:
+ if (pctrl->soc->pull_no_keeper)
+ return -ENOTSUPP;
+
arg = arg == MSM_KEEPER;
break;
case PIN_CONFIG_BIAS_PULL_UP:
- arg = arg == MSM_PULL_UP;
+ if (pctrl->soc->pull_no_keeper)
+ arg = arg == MSM_PULL_UP_NO_KEEPER;
+ else
+ arg = arg == MSM_PULL_UP;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
arg = msm_regval_to_drive(arg);
@@ -309,10 +316,16 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
arg = MSM_PULL_DOWN;
break;
case PIN_CONFIG_BIAS_BUS_HOLD:
+ if (pctrl->soc->pull_no_keeper)
+ return -ENOTSUPP;
+
arg = MSM_KEEPER;
break;
case PIN_CONFIG_BIAS_PULL_UP:
- arg = MSM_PULL_UP;
+ if (pctrl->soc->pull_no_keeper)
+ arg = MSM_PULL_UP_NO_KEEPER;
+ else
+ arg = MSM_PULL_UP;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
/* Check for invalid values */
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h
index 54fdd04ce9d5..9b9feea540ff 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.h
+++ b/drivers/pinctrl/qcom/pinctrl-msm.h
@@ -99,13 +99,14 @@ struct msm_pingroup {
/**
* struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
- * @pins: An array describing all pins the pin controller affects.
- * @npins: The number of entries in @pins.
- * @functions: An array describing all mux functions the SoC supports.
- * @nfunctions: The number of entries in @functions.
- * @groups: An array describing all pin groups the pin SoC supports.
- * @ngroups: The numbmer of entries in @groups.
- * @ngpio: The number of pingroups the driver should expose as GPIOs.
+ * @pins: An array describing all pins the pin controller affects.
+ * @npins: The number of entries in @pins.
+ * @functions: An array describing all mux functions the SoC supports.
+ * @nfunctions: The number of entries in @functions.
+ * @groups: An array describing all pin groups the pin SoC supports.
+ * @ngroups: The numbmer of entries in @groups.
+ * @ngpio: The number of pingroups the driver should expose as GPIOs.
+ * @pull_no_keeper: The SoC does not support keeper bias.
*/
struct msm_pinctrl_soc_data {
const struct pinctrl_pin_desc *pins;
@@ -115,6 +116,7 @@ struct msm_pinctrl_soc_data {
const struct msm_pingroup *groups;
unsigned ngroups;
unsigned ngpios;
+ bool pull_no_keeper;
};
int msm_pinctrl_probe(struct platform_device *pdev,
--
2.13.2
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